SAML21 DMA: Fix a logic error.  Since the write back descriptors overly the base descriptors, we need to do some special things in order to correctly free any allocated descriptors

SAMD21: Add build framework for DMA support.  Nothing there yet except for skeletal logic taken from SAM3/4.

STL32 F15x: stm32_stdclockconfig() was calling stm32_pw_setvos() which accessed PWR_CR via an inactive APB. From Juha Niskanen.

Add support for MK20DN--VLH5 and MK20DX---VLH5.  Needed for backward compatible support for Teensy-3.0

SAML21: Since SERCOM5 usese a different output channel, it will also need a different GCLK generator