WM8904: Correct calculation of bitrate (I am not sure why this is correct). LR clock divisor is now a constant 32-bits per frame. Conditioned out interrupt logic; it is not being used. Also added some FLL lock interrupt/poll logic (which was subsequently disabled).

WM8904 interface enable method now returns the previous interrupt state.  Correct ordering of some WM8904: Need to provide MCLK before initializing the WM8904, not after

WM8904:  Tried disabling the SYSCLK while updating the FLL.  Didn't help but is still probably a correct change

WM8904:  Various updates to get BCLK/LRCLK correct.  Acutally worse the parent, but I think is on the right track

PCM decoder: Correct the end of audio stream handling.  It was not being detected before so that logic was not examining the WAV header in the first buffer of the next audio file

SAMA5 SSC: Verify that the requested bit width is supported.  Correct some alignment tests that depend upon the data bit width.

WM8904:  Ad the MCLK frequency to the interface definition.  The WM8904 driver needs to know this frequency in order to configure the FLL to generate the correct bitrate

WM8904: Can't reset the WM8904 unless we also reinitiailize all registers.  Try to get a saner timeout based on sample rate, bits-per-sample, and buffer size.

Audio: Change how the end of the audio stream is detected by the leaf audio component.  This used by be done by looking for the first partial buffer.  That does not work with the in-place sub-sampling performed by the PCM decoder:  That always reduces the size of the buffer so that all buffers only partially filled by the time they get to the leaf.  Now, a flag is set in the audio buffer flags set to indicate the final buffer in the stream.

sem_wait: Use set_errno() and get_errno().  Direce access inside the OS may not be supported in the future.