Revamp the way external memory regions are configured; Add logic to add SAMA5 external memory regions to the heap

SAMA5 clock configuration should now agree with Atmel sample code; Added header file with macros to enable and disable peripheral clocking

Fix some SPI bit bang timing.  I still don't think it is working properly; I am going to need to borrow a logic analyzer

Revise how delays are calculated in SPI bit bang driver so that we may get a little better frequency resolution

Add a general bit-bang SPI lower-half driver and implement the bit-bang driver for the Arduino ITEAD TFT shield