arch/arm/src/nrf52/chip/nrf52_gpio.h

@@ -74,7 +74,14 @@
 #define NRF52_GPIO0_DIR              (NRF52_GPIO_P0_BASE + NRF52_GPIO_DIR_OFFSET)
 #define NRF52_GPIO0_DIRSET           (NRF52_GPIO_P0_BASE + NRF52_GPIO_DIRSET_OFFSET)
 #define NRF52_GPIO0_DIRCLR           (NRF52_GPIO_P0_BASE + NRF52_GPIO_DIRCLR_OFFSET)
+#define NRF52_GPIO0_CNF(n)           (NRF52_GPIO_P0_BASE + NRF52_GPIO_PIN_CNF_OFFSET(n))
 
 /* Register bit definitions *********************************************************/
 
+#define NRF52_GPIO_CNF_PULL_SHIFT       (2)
+#define NRF52_GPIO_CNF_PULL_MASK        (0x3 << NRF52_GPIO_CNF_PULL_SHIFT)
+#  define NRF52_GPIO_CNF_PULL_DISABLED  (0 << NRF52_GPIO_CNF_PULL_SHIFT)
+#  define NRF52_GPIO_CNF_PULL_DOWN      (1 << NRF52_GPIO_CNF_PULL_SHIFT)
+#  define NRF52_GPIO_CNF_PULL_UP        (3 << NRF52_GPIO_CNF_PULL_SHIFT)
+
 #endif /* __ARCH_ARM_SRC_NRF52_CHIP_NRF52_GPIO_H */

arch/arm/src/nrf52/nrf52_gpio.c

@@ -69,7 +69,7 @@ static inline void nrf52_gpio_input(unsigned int port, unsigned int pin)
 
   if (port == 0)
     {
-      putreg32(1 << pin, NRF52_GPIO0_DIRCLR);
+      putreg32(1U << pin, NRF52_GPIO0_DIRCLR);
     }
 }
 
@@ -89,9 +89,42 @@ static inline void nrf52_gpio_output(nrf52_pinset_t cfgset,
   /* Configure the pin as an output */
 
   if (port == 0)
-  {
-    putreg32(1 << pin, NRF52_GPIO0_DIRSET);
-  }
+    {
+      putreg32(1U << pin, NRF52_GPIO0_DIRSET);
+    }
+}
+
+/****************************************************************************
+ * Name: nrf52_gpio_mode
+ *
+ * Description:
+ *   Configure a GPIO mode based on bit-encoded description of the pin.
+ *
+ ****************************************************************************/
+
+static inline void nrf52_gpio_mode(nrf52_pinset_t cfgset,
+                                   unsigned int port, unsigned int pin)
+{
+  uint32_t mode;
+  uint32_t regval;
+
+  mode = cfgset & GPIO_MODE_MASK;
+  regval = getreg32(NRF52_GPIO0_CNF(pin));
+
+  regval &= NRF52_GPIO_CNF_PULL_MASK;
+
+  if (mode == GPIO_PULLUP)
+    {
+      regval &= NRF52_GPIO_CNF_PULL_MASK;
+      regval |= NRF52_GPIO_CNF_PULL_UP;
+    }
+  else if (mode == GPIO_PULLDOWN)
+    {
+      regval &= NRF52_GPIO_CNF_PULL_MASK;
+      regval |= NRF52_GPIO_CNF_PULL_DOWN;
+    }
+
+  putreg32(regval, NRF52_GPIO0_CNF(pin));
 }
 
 /****************************************************************************
@@ -131,7 +164,7 @@ int nrf52_gpio_config(nrf52_pinset_t cfgset)
 
       /* Set the mode bits */
 
-      //nrf52_gpio_iocon(cfgset, port, pin);
+      nrf52_gpio_mode(cfgset, port, pin);
 
       /* Handle according to pin function */
 
@@ -194,5 +227,11 @@ void nrf52_gpio_write(nrf52_pinset_t pinset, bool value)
 
 bool nrf52_gpio_read(nrf52_pinset_t pinset)
 {
-#warning Missing implementation!
+  uint32_t regval;
+  unsigned int pin;
+
+  pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
+  regval = getreg32(NRF52_GPIO0_IN);
+
+  return (regval >> pin) & 1UL;
 }

arch/arm/src/nrf52/nrf52_gpio.h

@@ -112,9 +112,9 @@
 
 #define GPIO_MODE_SHIFT         (7)      /* Bits 7-8: Pin pull-up mode */
 #define GPIO_MODE_MASK          (0x3 << GPIO_MODE_SHIFT)
-#  define GPIO_FLOAT            (GPIO_MODE_FLOAT    << GPIO_MODE_SHIFT) /* Neither pull-up nor -down */
-#  define GPIO_PULLDOWN         (GPIO_MODE_PULLDOWN << GPIO_MODE_SHIFT) /* Pull-down resistor enabled */
-#  define GPIO_PULLUP           (GPIO_MODE_PULLUP   << GPIO_MODE_SHIFT) /* Pull-up resistor enabled */
+#  define GPIO_FLOAT            (0 << GPIO_MODE_SHIFT) /* Neither pull-up nor -down */
+#  define GPIO_PULLDOWN         (1 << GPIO_MODE_SHIFT) /* Pull-down resistor enabled */
+#  define GPIO_PULLUP           (2 << GPIO_MODE_SHIFT) /* Pull-up resistor enabled */
 
 /* Initial value: V
  *

arch/arm/src/stm32/stm32_eth.c

 /****************************************************************************
  * arch/arm/src/stm32/stm32_eth.c
  *
- *   Copyright (C) 2011-2012, 2014, 2016-2017 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2014, 2016-2018 Gregory Nutt. All rights
+ *     reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -757,7 +758,7 @@ static inline void stm32_selectmii(void);
 static inline void stm32_selectrmii(void);
 #endif
 static inline void stm32_ethgpioconfig(FAR struct stm32_ethmac_s *priv);
-static void stm32_ethreset(FAR struct stm32_ethmac_s *priv);
+static int  stm32_ethreset(FAR struct stm32_ethmac_s *priv);
 static int  stm32_macconfig(FAR struct stm32_ethmac_s *priv);
 static void stm32_macaddress(FAR struct stm32_ethmac_s *priv);
 #ifdef CONFIG_NET_ICMPv6
@@ -2392,6 +2393,7 @@ static int stm32_ifdown(struct net_driver_s *dev)
 {
   FAR struct stm32_ethmac_s *priv = (FAR struct stm32_ethmac_s *)dev->d_private;
   irqstate_t flags;
+  int ret = OK;
 
   ninfo("Taking the network down\n");
 
@@ -2410,13 +2412,18 @@ static int stm32_ifdown(struct net_driver_s *dev)
    * successfully brings the interface back up.
    */
 
-  stm32_ethreset(priv);
+  ret = stm32_ethreset(priv);
+  if (ret < 0)
+    {
+      nerr("ERROR: stm32_ethreset failed (timeout), "
+           "still assuming it's going down.\n");
+    }
 
   /* Mark the device "down" */
 
   priv->ifup = false;
   leave_critical_section(flags);
-  return OK;
+  return ret;
 }
 
 /****************************************************************************
@@ -3572,15 +3579,16 @@ static inline void stm32_ethgpioconfig(FAR struct stm32_ethmac_s *priv)
  *   priv - A reference to the private driver state structure
  *
  * Returned Value:
- *   None.
+ *   Zero on success, or a negated errno value on any failure.
  *
  * Assumptions:
  *
  ****************************************************************************/
 
-static void stm32_ethreset(FAR struct stm32_ethmac_s *priv)
+static int stm32_ethreset(FAR struct stm32_ethmac_s *priv)
 {
   uint32_t regval;
+  uint32_t retries;
 
   /* Reset the Ethernet on the AHB bus (F1 Connectivity Line) or AHB1 bus (F2
    * and F4)
@@ -3615,7 +3623,20 @@ static void stm32_ethreset(FAR struct stm32_ethmac_s *priv)
    * after the reset operation has completed in all of the core clock domains.
    */
 
-  while ((stm32_getreg(STM32_ETH_DMABMR) & ETH_DMABMR_SR) != 0);
+  retries = 10;
+  while (((stm32_getreg(STM32_ETH_DMABMR) & ETH_DMABMR_SR) != 0) &&
+         retries > 0)
+    {
+      retries --;
+      up_mdelay(10);
+    }
+
+  if (retries == 0)
+    {
+      return -ETIMEDOUT;
+    }
+
+  return 0;
 }
 
 /****************************************************************************
@@ -3929,7 +3950,12 @@ static int stm32_ethconfig(FAR struct stm32_ethmac_s *priv)
   /* Reset the Ethernet block */
 
   ninfo("Reset the Ethernet block\n");
-  stm32_ethreset(priv);
+  ret = stm32_ethreset(priv);
+  if (ret < 0)
+    {
+      nerr("ERROR: Reset of Ethernet block failed\n");
+      return ret;
+    }
 
   /* Initialize the PHY */
 

configs/nrf52-pca10040/include/board.h

@@ -98,7 +98,19 @@
  */
 
 /* Button definitions *******************************************************/
-/* To be provided */
+/* Board supports four buttons. */
+
+#define BUTTON_BTN1       0
+#define BUTTON_BTN2       1
+#define BUTTON_BTN3       2
+#define BUTTON_BTN4       3
+
+#define NUM_BUTTONS       4
+
+#define BUTTON_BTN1_BIT  (1 << BUTTON_BTN1)
+#define BUTTON_BTN2_BIT  (1 << BUTTON_BTN2)
+#define BUTTON_BTN3_BIT  (1 << BUTTON_BTN3)
+#define BUTTON_BTN4_BIT  (1 << BUTTON_BTN4)
 
 /* UART Pins ****************************************************************/
 /*

configs/nrf52-pca10040/src/Makefile

@@ -48,4 +48,8 @@ else
 CSRCS += nrf52_userleds.c
 endif
 
+ifeq ($(CONFIG_ARCH_BUTTONS),y)
+CSRCS += nrf52_buttons.c
+endif
+
 include $(TOPDIR)/configs/Board.mk

configs/nrf52-pca10040/src/nrf52-pca10040.h

@@ -73,7 +73,12 @@
 #define GPIO_LED4  (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PIN20)
 
 /* Button definitions *******************************************************/
-/* to be provided */
+/* Board supports four buttons. */
+
+#define GPIO_BUTTON1 (GPIO_INPUT | GPIO_PULLUP | GPIO_PIN13)
+#define GPIO_BUTTON2 (GPIO_INPUT | GPIO_PULLUP | GPIO_PIN14)
+#define GPIO_BUTTON3 (GPIO_INPUT | GPIO_PULLUP | GPIO_PIN15)
+#define GPIO_BUTTON4 (GPIO_INPUT | GPIO_PULLUP | GPIO_PIN16)
 
 /****************************************************************************
  * Public Types

configs/nrf52-pca10040/src/nrf52_buttons.c

+/****************************************************************************
+ * configs/nrf52-pca10400/src/nrf52_buttons.c
+ *
+ *   Copyright (C) 2018 Gregory Nutt. All rights reserved.
+ *   Author:  Janne Rosberg <janne@offcode.fi>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <errno.h>
+
+#include <nuttx/arch.h>
+#include <nuttx/board.h>
+#include <arch/board/board.h>
+
+#include "nrf52_gpio.h"
+
+#include "nrf52-pca10040.h"
+
+#ifdef CONFIG_ARCH_BUTTONS
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Pin configuration for each PCA10400 button.  This array is indexed by
+ * the BUTTON_* definitions in board.h
+ */
+
+static const uint32_t g_buttons[NUM_BUTTONS] =
+{
+  GPIO_BUTTON1,
+  GPIO_BUTTON2,
+  GPIO_BUTTON3,
+  GPIO_BUTTON4
+};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_button_initialize
+ *
+ * Description:
+ *   board_button_initialize() must be called to initialize button resources.
+ *   After that, board_buttons() may be called to collect the current state
+ *   of all buttons or board_button_irq() may be called to register button
+ *   interrupt handlers.
+ *
+ ****************************************************************************/
+
+void board_button_initialize(void)
+{
+  int i;
+
+  /* Configure the GPIO pins as inputs. */
+
+  for (i = 0; i < NUM_BUTTONS; i++)
+    {
+      nrf52_gpio_config(g_buttons[i]);
+    }
+}
+
+/****************************************************************************
+ * Name: board_buttons
+ ****************************************************************************/
+
+uint32_t board_buttons(void)
+{
+  uint32_t ret = 0;
+
+  /* Check that state of each key */
+
+  if (!nrf52_gpio_read(g_buttons[BUTTON_BTN1]))
+    {
+      ret |= BUTTON_BTN1_BIT;
+    }
+
+  if (!nrf52_gpio_read(g_buttons[BUTTON_BTN2]))
+    {
+      ret |= BUTTON_BTN2_BIT;
+    }
+
+  if (!nrf52_gpio_read(g_buttons[BUTTON_BTN3]))
+    {
+      ret |= BUTTON_BTN3_BIT;
+    }
+
+  if (!nrf52_gpio_read(g_buttons[BUTTON_BTN4]))
+    {
+      ret |= BUTTON_BTN4_BIT;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Button support.
+ *
+ * Description:
+ *   board_button_initialize() must be called to initialize button resources.
+ *   After that, board_buttons() may be called to collect the current state
+ *   of all buttons or board_button_irq() may be called to register button
+ *   interrupt handlers.
+ *
+ *   After board_button_initialize() has been called, board_buttons() may be
+ *   called to collect the state of all buttons.  board_buttons() returns an
+ *   32-bit bit set with each bit associated with a button.  See the
+ *   BUTTON_*_BIT definitions in board.h for the meaning of each bit.
+ *
+ *   board_button_irq() may be called to register an interrupt handler that
+ *   will be called when a button is depressed or released.  The ID value is
+ *   a button enumeration value that uniquely identifies a button resource.
+ *   See the BUTTON_* definitions in board.h for the meaning of enumeration
+ *   value.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_IRQBUTTONS
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
+{
+  int ret = -ENOSYS;
+
+#warning Missing Implementation!
+
+  return ret;
+}
+#endif
+
+#endif /* CONFIG_ARCH_BUTTONS */