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meta_tester_si5338.kicad_pcb 144 KiB
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starting simulation for sampling head + layout for clock board  
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  (segment (start 150.548001 122.238001) (end 150.063001 122.238001) (width 0.15) (layer F.Cu) (net 88))
  (segment (start 150.063001 122.238001) (end 147.975 120.15) (width 0.15) (layer F.Cu) (net 88))
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starting placing components  
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starting layout  
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