Commits · 5d5384cc5eaef4c0ba67f4c95183e10c45d503f5 · nats / Rosie

Aug 15, 2015
- adding dc jack + layout · 5d5384cc
  nats authored Aug 15, 2015
  
  5d5384cc
Aug 14, 2015
- layout psu · fe0865b1
  nats authored Aug 15, 2015
  
  fe0865b1
- added 12 to 5V psu · 89751dd2
  nats authored Aug 14, 2015
  
  89751dd2
Aug 13, 2015
- adding PSU · 48091619
  nats authored Aug 13, 2015
  
  48091619
- adding bias tee · e5c4cd31
  nats authored Aug 13, 2015
  
  e5c4cd31
Aug 12, 2015
- adding SIGE · 2418333e
  nats authored Aug 13, 2015
  
  2418333e
- FPGA has now a master SPI to drive SAM3 · 723e416b
  nats authored Aug 12, 2015
  
  723e416b
- adding SiGe front end · bb4d61a2
  nats authored Aug 12, 2015
  
  bb4d61a2
Aug 11, 2015
- reblabla · e911634a
  nats authored Aug 12, 2015
  
  e911634a
- blabla · 022fdaf2
  nats authored Aug 12, 2015
  
  022fdaf2
- adding rf switch and attenuator · d796ad15
  nats authored Aug 11, 2015
  
  d796ad15
- adding fpga connectivity · 4ba3e6ae
  nats authored Aug 11, 2015
  
  4ba3e6ae
Aug 10, 2015
- blabla · 6e9fe7cd
  nats authored Aug 11, 2015
  
  6e9fe7cd
- nothing fancy · 8744d8b1
  nats authored Aug 10, 2015
  
  8744d8b1
- Merge pull request #1 from natsfr/max5190 · a4ad38cc
  nats authored Aug 10, 2015
```
Max5190
```
  a4ad38cc
- adding data lane · ad730032
  nats authored Aug 10, 2015
  
  ad730032
Aug 09, 2015
- test footprints · 72d7a358
  nats authored Aug 10, 2015
  
  72d7a358
- schematic SPI connections · fd43ccaf
  nats authored Aug 10, 2015
  
  fd43ccaf
- starting sam3 schematic · 0e9abbd6
  nats authored Aug 09, 2015
  
  0e9abbd6
Aug 08, 2015
- adding fpga configuration · f7508cc2
  nats authored Aug 08, 2015
  
  f7508cc2
Aug 07, 2015
- starting FPGA schematic · 4c8abbef
  nats authored Aug 07, 2015
  
  4c8abbef
- For review · 1fa7b8cd
  nats authored Aug 07, 2015
  
  1fa7b8cd
- added analog device doc · 0dbabac9
  nats authored Aug 07, 2015
  
  0dbabac9
- Added pll stuff · 8e03e180
  nats authored Aug 07, 2015
  
  8e03e180
Aug 06, 2015
- almost done pll layout · fcc0d372
  nats authored Aug 06, 2015
  
  fcc0d372
Aug 05, 2015
- starting PLL layout · e5861f3a
  nats authored Aug 05, 2015
  
  e5861f3a
- finished schematic for DAC · 0e283d36
  nats authored Aug 05, 2015
  
  0e283d36
Aug 04, 2015
- blabla · b48c8fed
  nats authored Aug 05, 2015
  
  b48c8fed
- added filter and DAC connection · d8f337e6
  nats authored Aug 04, 2015
  
  d8f337e6
Aug 02, 2015
- designning IF filter · e0f8b2ba
  nats authored Aug 03, 2015
  
  e0f8b2ba
- adding board · 3646e2e9
  nats authored Aug 02, 2015
  
  3646e2e9
Aug 01, 2015
- added prototype for dac interface, will be prune because board is borked · 08c2ac66
  nats authored Aug 01, 2015
  
  08c2ac66
Jul 28, 2015
- added max5190.v wrapper · 6141d381
  nats authored Jul 28, 2015
  
  6141d381
May 15, 2015
- fixed attenuation sign (it's an unsigned) · 2a4eea3d
  nats authored May 16, 2015
  
  2a4eea3d
- half working merging · c625de33
  nats authored May 15, 2015
  
  c625de33
- adding multi satellite · 00ca601a
  nats authored May 15, 2015
  
  00ca601a
May 13, 2015
- added propagated error for prn checking · 262712a0
  nats authored May 13, 2015
  
  262712a0
- simulation PRN checker OK · 85f80991
  nats authored May 13, 2015
  
  85f80991
May 11, 2015
- need to check PRN output · 63b5e949
  nats authored May 12, 2015
  
  63b5e949
May 04, 2015
- python to generate init line from data file · e8f62db7
  nats authored May 04, 2015
  
  e8f62db7