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Commit 3ff30608 authored by Gregory Nutt's avatar Gregory Nutt
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arch/arm/src/samdl: Mostly cosmetic improvements to previous commit.

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......@@ -6,7 +6,7 @@
* Matt Thompson <matt@extent3d.com>
*
* References:
* "Microchip SAMD21 datasheet"
* "Microchip SAMD21 datasheet"
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
......@@ -116,7 +116,6 @@
#define EIC_EXTINT_SHIFT (0) /* Bits 0-15: External interrupt n */
#define EIC_EXTINT_MASK (0x3ffff << EIC_EXTINT_SHIFT)
//# define EIC_EXTINT(n) ((uint32_t)(n) << EIC_EXTINT_SHIFT)
# define EIC_EXTINT(n) (1 << (n))
# define EIC_EXTINT_0 (1 << 0) /* Bit 0: External interrupt 0 */
# define EIC_EXTINT_1 (1 << 1) /* Bit 1: External interrupt 1 */
......
......@@ -123,7 +123,7 @@
#define EIC_EXTINT_SHIFT (0) /* Bits 0-15: External interrupt n */
#define EIC_EXTINT_MASK (0xffff << EIC_EXTINT_SHIFT)
# define EIC_EXTINT(n) ((uint32_t)(n) << EIC_EXTINT_SHIFT)
# define EIC_EXTINT(n) (1 << (n))
# define EIC_EXTINT_0 (1 << 0) /* Bit 0: External interrupt 0 */
# define EIC_EXTINT_1 (1 << 1) /* Bit 1: External interrupt 1 */
# define EIC_EXTINT_2 (1 << 2) /* Bit 2: External interrupt 2 */
......
......@@ -84,15 +84,15 @@ static int sam_eic_isr(int irq, FAR void *context, FAR void *arg)
for(bit=0;bit<SAM_IRQ_NEXTINTS;bit++)
{
if (intflag >> bit & 0x1)
{
irq_dispatch(SAM_IRQ_EXTINT0 + bit, context);
}
{
irq_dispatch(SAM_IRQ_EXTINT0 + bit, context);
}
}
/* Clear the pending interrupt flags */
putreg32(EIC_EXTINT_ALL, SAM_EIC_INTFLAG);
return 0;
}
......@@ -145,7 +145,7 @@ int sam_eic_initialize(uint8_t gclkgen)
regval = GCLK_CLKCTRL_ID_EIC | GCLK_CLKCTRL_GEN(gclkgen) | GCLK_CLKCTRL_CLKEN;
putreg16(regval, SAM_GCLK_CLKCTRL);
putreg8(EIC_CTRLA_ENABLE, SAM_EIC_CTRLA);
putreg8(EIC_CTRLA_ENABLE, SAM_EIC_CTRLA);
sam_eic_syncwait();
irq_attach(SAM_IRQ_EIC, sam_eic_isr, NULL);
......@@ -211,7 +211,7 @@ int sam_eic_config(uint8_t eirq, port_pinset_t pinset)
if (eirq < 8)
{
reg = SAM_EIC_CONFIG0;
val = EIC_CONFIG0_SENSE_BOTH(eirq);
if (pinset & PORT_INT_RISING)
{
......
......@@ -85,6 +85,22 @@ extern "C"
int sam_eic_initialize(uint8_t gclkgen);
/****************************************************************************
* Name: sam_eic_initialize
*
* Description:
* Enable a external interrupt.
*
* Input Parameters:
* irq - SAM_IRQ_EXTINTn IRQ to be enabled
*
* Returned Value:
* None
*
****************************************************************************/
int sam_eic_irq_enable(int irq);
/****************************************************************************
* Name: sam_eic_config
*
......
......@@ -190,13 +190,15 @@ static inline void sam_configinput(uintptr_t base, port_pinset_t pinset)
static inline void sam_configinterrupt(uintptr_t base, port_pinset_t pinset)
{
#ifdef CONFIG_SAMDL_EIC
uint32_t func;
uint32_t regval;
int pin;
pin = (pinset & PORT_PIN_MASK) >> PORT_PIN_SHIFT;
pin = (pinset & PORT_PIN_MASK) >> PORT_PIN_SHIFT;
regval = (PORT_WRCONFIG_WRPINCFG | PORT_WRCONFIG_WRPMUX | PORT_WRCONFIG_PMUXEN | PORT_WRCONFIG_INEN);
regval = (PORT_WRCONFIG_WRPINCFG | PORT_WRCONFIG_WRPMUX |
PORT_WRCONFIG_PMUXEN | PORT_WRCONFIG_INEN);
regval |= PORT_WRCONFIG_PINMASK(pin);
func = (pinset & PORT_FUNC_MASK) >> PORT_FUNC_SHIFT;
......@@ -204,15 +206,14 @@ static inline void sam_configinterrupt(uintptr_t base, port_pinset_t pinset)
putreg32(regval, base + SAM_PORT_WRCONFIG_OFFSET);
#ifdef CONFIG_SAMDL_EIC
/* Configure the interrupt edge sensitivity in CONFIGn register of the EIC */
sam_eic_config(pin, pinset);
#endif
#ifdef CONFIG_DEBUG_GPIO_INFO
sam_dumpport(pinset, "extint");
#endif
#endif /* CONFIG_SAMDL_EIC */
}
/****************************************************************************
......@@ -554,7 +555,7 @@ int sam_dumpport(uint32_t pinset, const char *msg)
/* Get the base address associated with the PIO port */
pin = (pinset & PORT_PIN_MASK) >> PORT_PIN_SHIFT;
pin = (pinset & PORT_PIN_MASK) >> PORT_PIN_SHIFT;
port = (pinset & PORT_MASK) >> PORT_SHIFT;
base = SAM_PORTN_BASE(port);
......
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