GPIO support/USART GPIO init

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3007 42af7a65-404d-4744-a932-0658087f49c3

arch/avr/src/at91uc3/at91uc3_clkinit.c

@@ -112,7 +112,7 @@ void up_clkinitialize(void)
   regval |= (AVR32_OSC0STARTUP << PM_OSCCTRL_STARTUP_SHIFT);
   putreg32(regval, AVR32_PM_OSCCTRL0);
 
-  /* Enabled OSC0 */
+  /* Enable OSC0 */
 
   regval = getreg32(AVR32_PM_MCCTRL);
   regval |= PM_MCCTRL_OSC0EN;
@@ -128,6 +128,9 @@ void up_clkinitialize(void)
   regval &= ~PM_MCCTRL_MCSEL_MASK;
   regval |= PM_MCCTRL_MCSEL_OSC0;
   putreg32(regval, AVR32_PM_MCCTRL);
+
+ /* Now, enable PLL0 */
+#warning "Missing Logic"
 }
 
 

arch/avr/src/at91uc3/at91uc3_config.h

@@ -129,11 +129,11 @@
 #  undef CONFIG_USART1_SERIAL_CONSOLE
 #  undef CONFIG_USART2_SERIAL_CONSOLE
 #  define HAVE_SERIAL_CONSOLE 1
-#elif defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_AVR32_USART10_RS232)
+#elif defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_AVR32_USART1_RS232)
 #  undef CONFIG_USART0_SERIAL_CONSOLE
 #  undef CONFIG_USART2_SERIAL_CONSOLE
 #  define HAVE_SERIAL_CONSOLE 1
-#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_AVR32_USART20_RS232)
+#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_AVR32_USART2_RS232)
 #  undef CONFIG_USART0_SERIAL_CONSOLE
 #  undef CONFIG_USART1_SERIAL_CONSOLE
 #  define HAVE_SERIAL_CONSOLE 1

arch/avr/src/at91uc3/at91uc3_gpio.c

@@ -39,16 +39,27 @@
 
 #include <nuttx/config.h>
 
-#include <errno.h>
+#include <sys/types.h>
+#include <assert.h>
 
 #include "at91uc3_config.h"
 #include "up_internal.h"
 #include "at91uc3_internal.h"
 
+#include "up_arch.h"
+#include "chip.h"
+#include "at91uc3_gpio.h"
+
 /**************************************************************************
  * Private Definitions
  **************************************************************************/
 
+/* How many GPIO ports are supported?  There are 32-pins per port and we
+ * know he number of GPIO pins supported by the architecture:
+ */
+
+#define AVR32_NGPIO_PORTS ((AVR32_NGPIO+31) >> 5)
+
 /**************************************************************************
  * Private Types
  **************************************************************************/
@@ -65,6 +76,25 @@
  * Private Variables
  **************************************************************************/
 
+static uint32_t g_portmap[AVR32_NGPIO_PORTS] =
+{
+#if AVR32_NGPIO > 0
+   AVR32_GPIO0_BASE
+#endif
+#if AVR32_NGPIO > 32
+   , AVR32_GPIO1_BASE,
+#endif
+#if AVR32_NGPIO > 64
+   , AVR32_GPIO2_BASE,
+#endif
+#if AVR32_NGPIO > 96
+   , AVR32_GPIO3_BASE,
+#endif
+#if AVR32_NGPIO > 128
+   , AVR32_GPIO4_BASE,
+#endif
+};
+
 /**************************************************************************
  * Private Functions
  **************************************************************************/
@@ -83,8 +113,117 @@
 
 int at91uc3_configgpio(uint16_t cfgset)
 {
-#warning "Not Implemented"
-  return -ENOSYS;
+  unsigned int port;
+  unsigned int pin;
+  uint32_t     pinmask;
+  uint32_t     base;
+
+  /* Extract then port number and the pin number from the configuration */
+
+  port = ((unsigned int)cfgset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
+  pin  = ((unsigned int)cfgset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
+  DEBUGASSERT(port < AVR32_NGPIO_PORTS);
+
+  /* Get pin mask and the GPIO base address */
+
+  pinmask = (1 << pin);
+  base    = g_portmap[port];
+
+  /* First, just to be safe, disable the output driver, give GPIO control of
+   * the pin, rese the peripheral mux, set the output low, remove the pull-up,
+   * disable GPIO interrupts, reset the interrupt mode, and disable glitch
+   * filtering, while we reconfigure the pin.
+   */
+
+  putreg32(pinmask, base + AVR32_GPIO_ODERC_OFFSET);
+  putreg32(pinmask, base + AVR32_GPIO_GPERS_OFFSET);
+  putreg32(pinmask, base + AVR32_GPIO_PMR0C_OFFSET);
+  putreg32(pinmask, base + AVR32_GPIO_PMR1C_OFFSET);
+  putreg32(pinmask, base + AVR32_GPIO_OVRC_OFFSET);
+  putreg32(pinmask, base + AVR32_GPIO_PUERC_OFFSET);
+  putreg32(pinmask, base + AVR32_GPIO_IERC_OFFSET);
+  putreg32(pinmask, base + AVR32_GPIO_IMR0C_OFFSET);
+  putreg32(pinmask, base + AVR32_GPIO_IMR0C_OFFSET);
+  putreg32(pinmask, base + AVR32_GPIO_GFERC_OFFSET);
+
+  /* Is this a GPIO?  Or a peripheral */
+
+  if ((cfgset & GPIO_ENABLE) != 0)
+    {
+      /* Its a GPIO.  Input or output? */
+ 
+      if ((cfgset & GPIO_OUTPUT) != 0)
+        {
+          /* Its a GPIO output. Set up the initial output value and enable
+           * the output driver.
+           */
+ 
+          if ((cfgset & GPIO_VALUE) != 0)
+            {
+              putreg32(pinmask, base + AVR32_GPIO_OVRS_OFFSET);
+            }
+          putreg32(pinmask, base + AVR32_GPIO_ODERS_OFFSET);
+        }
+      else
+        {
+          /* Its a GPIO input.  There is nothing more to do here. */
+        }
+    }
+  else
+    {
+      /* Its a peripheral.  Set the peripheral mux */
+
+      if ((cfgset & GPIO_PMR0) != 0)
+        {
+          putreg32(pinmask, base + AVR32_GPIO_PMR0S_OFFSET);
+        }
+
+      if ((cfgset & GPIO_PMR1) != 0)
+        {
+          putreg32(pinmask, base + AVR32_GPIO_PMR1S_OFFSET);
+        }
+
+      /* And enable peripheral control of the pin */
+
+      putreg32(pinmask, base + AVR32_GPIO_GPERC_OFFSET);
+    }
+
+  /* Then the "ornaments" tha do not depend on gpio/peripheral mode:
+   * Pull-ups and glitch filering.
+   */
+
+  if ((cfgset & GPIO_PULLUP) != 0)
+    {
+      putreg32(pinmask, base + AVR32_GPIO_PUERS_OFFSET);
+    }
+
+  if ((cfgset & GPIO_PULLUP) != 0)
+    {
+      putreg32(pinmask, base + AVR32_GPIO_GFERS_OFFSET);
+    }
+
+  /* Check for GPIO interrupt */
+
+  if ((cfgset & GPIO_INTR) != 0)
+    {
+      /* Set up the interrupt mode */
+
+      if ((cfgset & GPIO_IMR0) != 0)
+        {
+          putreg32(pinmask, base + AVR32_GPIO_IMR0S_OFFSET);
+        }
+
+      if ((cfgset & GPIO_IMR1) != 0)
+        {
+          putreg32(pinmask, base + AVR32_GPIO_IMR1S_OFFSET);
+        }
+
+      /* Then enable the GPIO interrupt */
+
+      putreg32(pinmask, base + AVR32_GPIO_IERS_OFFSET);
+    }
+  
+  return OK;
 }
 
 /************************************************************************************
@@ -97,7 +236,32 @@ int at91uc3_configgpio(uint16_t cfgset)
 
 void at91uc3_gpiowrite(uint16_t pinset, bool value)
 {
-#warning "Not Implemented"
+  unsigned int port;
+  unsigned int pin;
+  uint32_t     pinmask;
+  uint32_t     base;
+
+  /* Extract then port number and the pin number from the configuration */
+
+  port = ((unsigned int)pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
+  pin  = ((unsigned int)pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
+  DEBUGASSERT(port < AVR32_NGPIO_PORTS);
+
+  /* Get pin mask and the GPIO base address */
+
+  pinmask = (1 << pin);
+  base    = g_portmap[port];
+
+  /* Now, set or clear the pin ouput value */
+
+  if (value)
+    {
+      putreg32(pinmask, base + AVR32_GPIO_OVRS_OFFSET);
+    }
+  else
+    {
+      putreg32(pinmask, base + AVR32_GPIO_OVRC_OFFSET);
+    }
 }
 
 /************************************************************************************
@@ -110,6 +274,23 @@ void at91uc3_gpiowrite(uint16_t pinset, bool value)
 
 bool at91uc3_gpioread(uint16_t pinset)
 {
-#warning "Not Implemented"
-  return false;
+  unsigned int port;
+  unsigned int pin;
+  uint32_t     pinmask;
+  uint32_t     base;
+
+  /* Extract then port number and the pin number from the configuration */
+
+  port = ((unsigned int)pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
+  pin  = ((unsigned int)pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
+  DEBUGASSERT(port < AVR32_NGPIO_PORTS);
+
+  /* Get pin mask and the GPIO base address */
+
+  pinmask = (1 << pin);
+  base    = g_portmap[port];
+
+  /* Now, return the current pin value */
+
+  return (getreg32(base + AVR32_GPIO_PVR_OFFSET) & pinmask) != 0;
 }

arch/avr/src/at91uc3/at91uc3_internal.h

@@ -72,6 +72,9 @@
 #  define GPIO_INTMODE_RISING      (1 << GPIO_INTMODE_SHIFT)
 #  define GPIO_INTMODE_FALLING     (2 << GPIO_INTMODE_SHIFT)
 
+#  define GPIO_IMR0                (1 << GPIO_INTMODE_SHIFT)
+#  define GPIO_IMR1                (2 << GPIO_INTMODE_SHIFT)
+
 /* Interrupt enable
  * ...I .... .... ....
  */
@@ -102,14 +105,14 @@
  */
 
 #define GPIO_FUNC_SHIFT            (9)       /* Bits 9-10: Peripheral MUX */
-#define GPIO_FUNC_MASK             (3 << GPIO_MUX_SHIFT)
-#  define GPIO_FUNCA               (0 << GPIO_MUX_SHIFT) /* PMR0=0 PMR1=0 */
-#  define GPIO_FUNCB               (1 << GPIO_MUX_SHIFT) /* PMR0=1 PMR1=0 */
-#  define GPIO_FUNCC               (2 << GPIO_MUX_SHIFT) /* PMR0=0 PMR1=1 */
-#  define GPIO_FUNCD               (3 << GPIO_MUX_SHIFT) /* PMR0=1 PMR1=1 */
-
-#  define GPIO_PMR0                (1 << GPIO_MUX_SHIFT)
-#  define GPIO_PMR1                (2 << GPIO_MUX_SHIFT)
+#define GPIO_FUNC_MASK             (3 << GPIO_FUNC_SHIFT)
+#  define GPIO_FUNCA               (0 << GPIO_FUNC_SHIFT) /* PMR0=0 PMR1=0 */
+#  define GPIO_FUNCB               (1 << GPIO_FUNC_SHIFT) /* PMR0=1 PMR1=0 */
+#  define GPIO_FUNCC               (2 << GPIO_FUNC_SHIFT) /* PMR0=0 PMR1=1 */
+#  define GPIO_FUNCD               (3 << GPIO_FUNC_SHIFT) /* PMR0=1 PMR1=1 */
+
+#  define GPIO_PMR0                (1 << GPIO_FUNC_SHIFT)
+#  define GPIO_PMR1                (2 << GPIO_FUNC_SHIFT)
 
 /* GPIO Enable (1) or Peripheral Enable (0)
  * .... .... .... .... .... ...G .... ....

arch/avr/src/at91uc3/at91uc3_lowconsole.c

@@ -50,6 +50,7 @@
 #include "up_internal.h"
 #include "at91uc3_internal.h"
 #include "at91uc3_usart.h"
+#include "at91uc3_pinmux.h"
 
 /******************************************************************************
  * Private Definitions
@@ -301,10 +302,46 @@ void usart_configure(uintptr_t usart_base, uint32_t baud, unsigned int parity,
 #ifndef CONFIG_USE_EARLYSERIALINIT
 void up_consoleinit(void)
 {
-#ifdef HAVE_SERIAL_CONSOLE
+  /* Setup GPIO pins for each configured USART/UART */
+
+#ifdef CONFIG_AVR32_USART0_RS232
+  /* PINMUX_USART0_RXD and PINMUX_USART0_TXD must be defined in board.h.  It
+   * must define them be be one of {PINMUX_USART0_RXD_1, PINMUX_USART0_RXD_2}
+   * and {PINMUX_USART_0TXD_1, PINMUX_USART0_TXD_2}, respectively.
+   */
+
+  at91uc3_configgpio(PINMUX_USART0_RXD);
+  at91uc3_configgpio(PINMUX_USART0_TXD);
+
+#endif
+#ifdef CONFIG_AVR32_USART1_RS232
+  /* PINMUX_USART1_RXD and PINMUX_USART1_TXD must be defined in board.h.  It
+   * must define them be be one of {PINMUX_USART1_RXD_1, PINMUX_USART1_RXD_2,
+   * PINMUX_USART1_RXD_3} and {PINMUX_USART1_TXD_1, PINMUX_USART1_TXD_2,
+   * PINMUX_USART1_TXD_3}, respectively.
+   */
+
+  at91uc3_configgpio(PINMUX_USART1_RXD);
+  at91uc3_configgpio(PINMUX_USART1_TXD);
+
+#endif
+#ifdef CONFIG_AVR32_USART2_RS232
+  /* PINMUX_USART2_RXD and PINMUX_USART2_TXD must be defined in board.h.  It
+   * must define them be be one of {PINMUX_USART2_RXD_1, PINMUX_USART2_RXD_2}
+   * and {PINMUX_USART2_TXD_1, PINMUX_USART2_TXD_2}, respectively.
+   */
+
+  at91uc3_configgpio(PINMUX_USART2_RXD);
+  at91uc3_configgpio(PINMUX_USART2_TXD);
+#endif
+
+  /* Then configure the console here (if it is not going to be configured
+   * by up_earlyserialinit()).
+   */
+
+#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_USE_EARLYSERIALINIT)
   usart_configure(AVR32_CONSOLE_BASE, AVR32_CONSOLE_BAUD, AVR32_CONSOLE_PARITY,
                   AVR32_CONSOLE_BITS, (bool)AVR32_CONSOLE_2STOP);
-# warning "Probably not all Implemented"
 #endif
 }
 #endif

arch/avr/src/at91uc3/at91uc3_lowinit.c

@@ -89,14 +89,13 @@ void up_lowinit(void)
 
   /* Initialize a console (probably a serial console) */
 
-#ifndef CONFIG_USE_EARLYSERIALINIT
   up_consoleinit();
-#else
 
   /* Perform early serial initialization (so that we will have debug output
    * available as soon as possible).
    */
 
+#ifdef CONFIG_USE_EARLYSERIALINIT
   up_earlyserialinit();
 #endif
 

configs/avr32dev1/include/board.h

@@ -63,6 +63,11 @@
 #define AVR32_CPU_CLOCK      AVR32_FOSC0
 #define AVR32_PBA_CLOCK      AVR32_FOSC0
 
+/* Pin muliplexing selecion *********************************************************/
+
+#define PINMUX_USART1_RXD    PINMUX_USART1_RXD_1
+#define PINMUX_USART1_TXD    PINMUX_USART1_TXD_1
+
 /* LED definitions ******************************************************************/
 
 #define LED_STARTED          0

configs/avr32dev1/ostest/defconfig

@@ -109,8 +109,8 @@ CONFIG_AVR32_AVRTOOLSL=n
 # CONFIG_AVR32_USARTn_ISO786 - Configure USARTn as an ISO786 interface.
 #
 
-CONFIG_AVR32_USART0=y
-CONFIG_AVR32_USART0_RS232=y
+CONFIG_AVR32_USART0=n
+CONFIG_AVR32_USART0_RS232=n
 CONFIG_AVR32_USART0_SPI=n
 CONFIG_AVR32_USART0_RS485=n
 CONFIG_AVR32_USART0_MAN=n
@@ -118,8 +118,8 @@ CONFIG_AVR32_USART0_MODEM=n
 CONFIG_AVR32_USART0_IRDA=n
 CONFIG_AVR32_USART0_ISO786=n
 
-CONFIG_AVR32_USART1=n
-CONFIG_AVR32_USART1_RS232=n
+CONFIG_AVR32_USART1=y
+CONFIG_AVR32_USART1_RS232=y
 CONFIG_AVR32_USART1_SPI=n
 CONFIG_AVR32_USART1_RS485=n
 CONFIG_AVR32_USART1_MAN=n
@@ -150,8 +150,8 @@ CONFIG_AVR32_USART2_ISO786=n
 # CONFIG_USARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
 # CONFIG_USARTn_2STOP - Two stop bits
 #
-CONFIG_USART0_SERIAL_CONSOLE=y
-CONFIG_USART1_SERIAL_CONSOLE=n
+CONFIG_USART0_SERIAL_CONSOLE=n
+CONFIG_USART1_SERIAL_CONSOLE=y
 CONFIG_USART2_SERIAL_CONSOLE=n
 
 CONFIG_USART0_TXBUFSIZE=256