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Commit 6f335dc6 authored by Gregory Nutt's avatar Gregory Nutt
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STM32 SPI: The source clock for SPI 4,5, and 6 should be PCLK2, not PCLK1...

STM32 SPI:  The source clock for SPI 4,5, and 6 should be PCLK2, not PCLK1 (for F411, F427, and F429).  Per David Sidrane.
parent 8f4bbdd0
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