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f4grx
NuttX RTOS
Commits
a05d9c18
Commit
a05d9c18
authored
8 years ago
by
Michał Łyszczek
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Add connectivity line stm32 to be able to compile SYSCFG, add definitions for
usb clock divs
parent
795db7c1
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arch/arm/src/stm32/Kconfig
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-1
1 addition, 1 deletion
arch/arm/src/stm32/Kconfig
arch/arm/src/stm32/chip/stm32f10xxx_rcc.h
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arch/arm/src/stm32/chip/stm32f10xxx_rcc.h
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arch/arm/src/stm32/Kconfig
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a05d9c18
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@@ -2074,7 +2074,7 @@ config STM32_SPI6
config STM32_SYSCFG
bool "SYSCFG"
default y
depends on STM32_STM32L15XX || STM32_STM32F30XX || STM32_STM32F37XX || STM32_STM32F207 || STM32_STM32F40XX
depends on STM32_STM32L15XX || STM32_STM32F30XX || STM32_STM32F37XX || STM32_STM32F207 || STM32_STM32F40XX
|| STM32_CONNECTIVITYLINE
config STM32_TIM1
bool "TIM1"
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arch/arm/src/stm32/chip/stm32f10xxx_rcc.h
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a05d9c18
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@@ -172,9 +172,13 @@
#ifndef CONFIG_STM32_VALUELINE
# define RCC_CFGR_USBPRE (1 << 22)
/* Bit 22: USB FS prescaler */
# define RCC_CFGR_USBPREd0 (0)
/* PLLCLK / 1 */
# define RCC_CFGR_USBPREd15 (1)
/* PLLCLK / 1.5 */
#endif
#ifdef CONFIG_STM32_CONNECTIVITYLINE
# define RCC_CFGR_OTGFSPRE (1 << 22)
/* Bit 22: OTG FS prescaler */
# define RCC_CFGR_OTGFSPREd2 (1)
/* PLL_VCO (2x PLLCLK) / 2 */
# define RCC_CFGR_OTGFSPREd3 (0)
/* PLL_VCO (3x PLLCLK) / 3 */
#endif
#define RCC_CFGR_MCO_SHIFT (24)
/* Bits 27-24: Microcontroller Clock Output */
#define RCC_CFGR_MCO_MASK (15 << RCC_CFGR_MCO_SHIFT)
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