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Commit b41c96e1 authored by Gregory Nutt's avatar Gregory Nutt
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Beginning debug of SAM4L Xplained SLCD

parent 7b716cf8
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......@@ -768,6 +768,10 @@ Configuration sub-directories
Board Selection -> Board-Specific Options -> SAM4L Xplained Pro Modules
CONFIG_SAM4L_XPLAINED_SLCD1MODULE=y
Device Drivers
CONFIG_LCD=y
CONFIG_LCD_MAXCONTRAST=63
Library Routines -> Non-standard Library Support
CONFIG_LIB_SLCDCODEC=y
......
......@@ -70,9 +70,11 @@ CSRCS += sam_slcd.c
endif
endif
ifeq ($(CONFIG_SAM34_SPI),y)
ifeq ($(CONFIG_SAM4L_XPLAINED_IOMODULE),y)
CSRCS += sam_mmcsd.c
endif
endif
COBJS = $(CSRCS:.c=$(OBJEXT))
......
......@@ -262,10 +262,23 @@ void weak_function sam_spiinitialize(void);
*
************************************************************************************/
#ifdef CONFIG_SAM4L_XPLAINED_IOMODULE
#if defined(CONFIG_SAM34_SPI) && defined(CONFIG_SAM4L_XPLAINED_IOMODULE)
int sam_sdinitialize(int minor);
#endif
/****************************************************************************
* Name: sam_slcd_initialize
*
* Description:
* Initialize the SAM4L Xplained Pro LCD hardware and register the character
* driver as /dev/slcd.
*
****************************************************************************/
#if defined(CONFIG_SAM34_LCDCA) && defined(CONFIG_SAM4L_XPLAINED_SLCD1MODULE)
int sam_slcd_initialize(void);
#endif
/************************************************************************************
* Name: up_ledinit
************************************************************************************/
......
......@@ -99,20 +99,31 @@
int nsh_archinitialize(void)
{
#ifdef CONFIG_SAM4L_XPLAINED_IOMODULE
int ret;
#if defined(CONFIG_SAM34_LCDCA) && defined(CONFIG_SAM4L_XPLAINED_SLCD1MODULE)
/* Initialize the SLCD and register the SLCD device as /dev/slcd */
{
int ret = sam_slcd_initialize();
if (ret < 0)
{
message("nsh_archinitialize: Failed to initialize the LCD: %d\n",
ret);
return ret;
}
}
#endif
#if defined(CONFIG_SAM34_SPI) && defined(CONFIG_SAM4L_XPLAINED_IOMODULE)
/* Initialize the SPI-based MMC/SD slot */
#ifdef CONFIG_SAM4L_XPLAINED_IOMODULE
ret = sam_sdinitialize(CONFIG_NSH_MMCSDMINOR);
if (ret < 0)
{
message("nsh_archinitialize: Failed to initialize MMC/SD slot: %d\n",
ret);
return ret;
}
{
int ret = sam_sdinitialize(CONFIG_NSH_MMCSDMINOR);
if (ret < 0)
{
message("nsh_archinitialize: Failed to initialize MMC/SD slot: %d\n",
ret);
return ret;
}
}
#endif
return OK;
......
......@@ -118,7 +118,7 @@
#define SLCD_MAXCONTRAST 63
#define BOARD_SLCD_NCOM 4
#define BOARD_SLCD_NSEG 40
#define BOARD_SLCD_NSEG 24
#define SLCD_NPINS (BOARD_SLCD_NCOM+BOARD_SLCD_NSEG+1)
/* An ASCII character may need to be decorated with a preceding decimal
......@@ -333,8 +333,6 @@ static gpio_pinset_t g_slcdgpio[SLCD_NPINS] =
GPIO_LCDCA_SEG12, GPIO_LCDCA_SEG13, GPIO_LCDCA_SEG14, GPIO_LCDCA_SEG15,
GPIO_LCDCA_SEG16, GPIO_LCDCA_SEG17, GPIO_LCDCA_SEG18, GPIO_LCDCA_SEG19,
GPIO_LCDCA_SEG20, GPIO_LCDCA_SEG21, GPIO_LCDCA_SEG22, GPIO_LCDCA_SEG23,
GPIO_LCDCA_SEG24, GPIO_LCDCA_SEG25, GPIO_LCDCA_SEG26, GPIO_LCDCA_SEG27,
GPIO_LCDCA_SEG28, GPIO_LCDCA_SEG29, GPIO_LCDCA_SEG30,
GPIO_LCD1_BL
};
......@@ -1238,7 +1236,9 @@ int sam_slcd_initialize(void)
/* Turn on the backlight */
sam_gpiowrite(GPIO_LCD1_BL, true);
slcd_dumpstate("AFTER INITIALIZATION");
slcd_dumpslcd("AFTER INITIALIZATION");
}
return ret;
......
......@@ -156,16 +156,21 @@
#define ALIGNED_BUFSIZE ((CONFIG_NET_BUFSIZE + 255) & ~255)
#if 0 /* Fix for Errata #5 */
# define PKTMEM_TX_START 0x0000 /* Start TX buffer at 0 */
# define PKTMEM_TX_ENDP1 ALIGNED_BUFSIZE /* Allow TX buffer for one frame */
# define PKTMEM_RX_START PKTMEM_TX_ENDP1 /* Followed by RX buffer */
# define PKTMEM_RX_END PKTMEM_END /* RX buffer goes to the end of SRAM */
/* Work around Errata #5 (spurious reset of ERXWRPT to 0) by placing the RX
* FIFO at the beginning of packet memory.
*/
#define ERRATA5 1
#if ERRATA5
# define PKTMEM_RX_START 0x0000 /* RX buffer must be at addr 0 for errata 5 */
# define PKTMEM_RX_END (PKTMEM_END-ALIGNED_BUFSIZE) /* RX buffer length is total SRAM minus TX buffer */
# define PKTMEM_TX_START (PKTMEM_RX_END+1) /* Start TX buffer after */
# define PKTMEM_TX_ENDP1 (PKTMEM_TX_START+ALIGNED_BUFSIZE) /* Allow TX buffer for one frame */
#else
# define PKTMEM_RX_START 0x0000
# define PKTMEM_RX_END (PKTMEM_END-ALIGNED_BUFSIZE)
# define PKTMEM_TX_START (PKTMEM_RX_END+1)
# define PKTMEM_TX_ENDP1 (PKTMEM_TX_START+ALIGNED_BUFSIZE)
# define PKTMEM_TX_START 0x0000 /* Start TX buffer at 0 */
# define PKTMEM_TX_ENDP1 ALIGNED_BUFSIZE /* Allow TX buffer for one frame */
# define PKTMEM_RX_START PKTMEM_TX_ENDP1 /* Followed by RX buffer */
# define PKTMEM_RX_END PKTMEM_END /* RX buffer goes to the end of SRAM */
#endif
/* Misc. Helper Macros ******************************************************/
......
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