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Commit bf27d79c authored by patacongo's avatar patacongo
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Add preliminary support for Z16F serial port

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@560 42af7a65-404d-4744-a932-0658087f49c3
parent ad126894
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......@@ -44,5 +44,5 @@ CMN_CSRCS = up_allocateheap.c up_initialize.c up_schedulesigaction.c \
up_exit.c up_releasestack.c up_idle.c up_reprioritizertr.c
CHIP_SSRCS = z16f_lowuart.S
CHIP_CSRCS = z16f_clkinit.c z16f_irq.c z16f_timerisr.c
CHIP_CSRCS = z16f_clkinit.c z16f_irq.c z16f_timerisr.c z16f_serial.c
......@@ -322,7 +322,24 @@
# define Z16F_GPIOK_SMRE _HX32(ffffe198) /* 8-bits: Port K Stop Mode Recovery En */
#endif
/* UART0/1 registers ****************************************************************/
/* UART Register Offsets *************************************************************/
#define Z16F_UART_TXD _HX8(00) /* 8-bits: UART Transmit Data */
#define Z16F_UART_RXD _HX8(00) /* 8-bits: UART Receive Data */
#define Z16F_UART_STAT0 _HX8(01) /* 8-bits: UART Status 0 */
#define Z16F_UART_CTL _HX8(02) /* 16-bits: UART Control */
#define Z16F_UART_CTL0 _HX8(02) /* 8-bits: UART Control 0 */
#define Z16F_UART_CTL1 _HX8(03) /* 8-bits: UART COntrol 1 */
#define Z16F_UART_MDSTAT _HX8(04) /* 8-bits: UART Mode Select & Status */
#define Z16F_UART_ADDR _HX8(05) /* 8-bits: UART Address Compare */
#define Z16F_UART_BR _HX8(06) /* 16-bits: UART Baud Rate */
#define Z16F_UART_BRH _HX8(06) /* 8-bits: UART Baud Rate High Byte */
#define Z16F_UART_BRL _HX8(07) /* 8-bits: UART Baud Rate Low Byte */
#define Z16F_UART0_BASE _HX32(ffffe200) /* UART0 Register Base Address */
#define Z16F_UART1_BASE _HX32(ffffe210) /* UART1 Register Base Address */
/* UART0/1 Registers ****************************************************************/
#define Z16F_UART0_TXD _HX32(ffffe200) /* 8-bits: UART0 Transmit Data */
#define Z16F_UART0_RXD _HX32(ffffe200) /* 8-bits: UART0 Receive Data */
......@@ -348,6 +365,45 @@
#define Z16F_UART1_BRH _HX32(ffffe216) /* 8-bits: UART1 Baud Rate High Byte */
#define Z16F_UART1_BRL _HX32(ffffe217) /* 8-bits: UART1 Baud Rate Low Byte */
/* UART0/1 Status 0 Register Bit Definitions ****************************************/
#define Z16F_UARTSTAT0_RDA _HX8(0x80) /* Bit 7: Receive Data Available */
#define Z16F_UARTSTAT0_PE _HX8(0x40) /* Bit 6: Parity Error */
#define Z16F_UARTSTAT0_OE _HX8(0x20) /* Bit 5: Overrun Error */
#define Z16F_UARTSTAT0_FE _HX8(0x10) /* Bit 4: Framing Error */
#define Z16F_UARTSTAT0_BRKD _HX8(0x08) /* Bit 3: Break Detect */
#define Z16F_UARTSTAT0_TDRE _HX8(0x04) /* Bit 2: Transmitter Data Register Empty */
#define Z16F_UARTSTAT0_TXE _HX8(0x02) /* Bit 1: Transmitter Empty */
#define Z16F_UARTSTAT0_CTS _HX8(0x01) /* Bit 0: Clear To Send */
/* UART0/1 Control 0/1 Register Bit Definitions *************************************/
#define Z16F_UARTCTL0_TEN _HX8(0x80) /* Bit 7: Transmit Enable */
#define Z16F_UARTCTL0_REN _HX8(0x40) /* Bit 6: Receive Enable */
#define Z16F_UARTCTL0_CTSE _HX8(0x20) /* Bit 5: CTS Enable */
#define Z16F_UARTCTL0_PEN _HX8(0x10) /* Bit 4: Parity Enable */
#define Z16F_UARTCTL0_PSEL _HX8(0x08) /* Bit 3: Odd Parity Select */
#define Z16F_UARTCTL0_SBRK _HX8(0x04) /* Bit 2: Send Break */
#define Z16F_UARTCTL0_STOP _HX8(0x02) /* Bit 1: Stop Bit Select */
#define Z16F_UARTCTL0_LBEN _HX8(0x01) /* Bit 0: Loopback Enable */
#define Z16F_UARTCTL1_MPMD1 _HX8(0x80) /* Bit 7: Multiprocessor Mode (bit1) */
#define Z16F_UARTCTL1_MPEN _HX8(0x40) /* Bit 6: Multiprocessor Enable */
#define Z16F_UARTCTL1_MPMD0 _HX8(0x20) /* Bit 5: Multiprocessor Mode (bit0) */
#define Z16F_UARTCTL1_MPBT _HX8(0x10) /* Bit 4: Multiprocessor Bit Transmit */
#define Z16F_UARTCTL1_DEPOL _HX8(0x08) /* Bit 3: Driver Enable Polarity */
#define Z16F_UARTCTL1_BRGCTL _HX8(0x04) /* Bit 2: Baud Rate Generator Control */
#define Z16F_UARTCTL1_RDAIRQ _HX8(0x02) /* Bit 1: Receive Data Interrupt Enable */
#define Z16F_UARTCTL1_IREN _HX8(0x01) /* Bit 0: Infrared Encoder/Decoder Eanble */
/* UART0/1 Mode Status/Select Register Bit Definitions ******************************/
#define Z16F_UARTMDSEL_NORMAL _HX8(0x00) /* Bits 5-7=0: Multiprocessor and Normal Mode */
#define Z16F_UARTMDSEL_FILTER _HX8(0x20) /* Bits 5-7=1: Noise Filter Control/Status */
#define Z16F_UARTMDSEL_LINP _HX8(0x40) /* Bits 5-7=2: LIN protocol Contol/Status */
#define Z16F_UARTMDSEL_HWREV _HX8(0xe0) /* Bits 5-7=7: LIN-UART Hardware Revision */
/* Bits 0-4: Mode dependent status */
/* Timer0/1/2 registers *************************************************************/
#define Z16F_TIMER0_HL _HX32(ffffe300) /* 16-bit: Timer 0 */
......
......@@ -79,42 +79,55 @@
* Initialize UART0 or UART1
*
* Parameters:
* r1 = 0:UART0 1:UART1
* r2 = Frequency
* r3 = BAUD rate
* None
*
*************************************************************************/
z16f_lowuartinit:
pushmlo <r0,R3> /* Save registers */
pushmlo <r0, r3> /* Save registers */
/* Calculate and set the baud rate generation register */
ld r3, #_SYS_CLK_FREQ
ld r0, R3
sll r0, #3
#ifdef CONFIG_UART0_SERIAL_CONSOLE
sll r0, #CONFIG_UART0_BAUD
ld r3, #CONFIG_UART0_BAUD /* r3 = baud */
#else
sll r0, #CONFIG_UART1_BAUD
ld r3, #CONFIG_UART1_BAUD /* r3 = baud */
#endif
sll R3, #4
udiv r0, R3 /* BRG = (freq + baud * 8)/(baud * 16) */
ld r0, r3 /* r0 = baud */
sll r0, #3 /* r0 = baud * 8 */
add r0, #_SYS_CLK_FREQ /* r3 = freq + baud * 8*/
sll r3, #4 /* r3 = baud * 16 */
udiv r0, r3 /* BRG = (freq + baud * 8)/(baud * 16) */
#ifdef CONFIG_UART0_SERIAL_CONSOLE
ld.w Z16F_UART0_BR, r0 /* Z16F_UART0_BR = BRG */
/* Set the GPIO Alternate Function Register Lo (AFL) register */
ld r0, #%30
or.b Z16F_GPIOA_AFL, r0 /* Z16F_GPIOA_AFL |= %30 */
/* Enable UART receive (REN) and transmit (TEN) */
clr.b Z16F_UART0_CTL1 /* Z16F_UART0_CTL1 = 0 */
ld r0, #%c0
ld r0, #(Z16F_UARTCTL0_TEN|Z16F_UARTCTL0_REN)
ld.b Z16F_UART0_CTL0, r0 /* Z16F_UART0_CTL0 = %c0 */
#else
ld.w Z16F_UART1_BR, r0 /* Z16F_UART1_BR = BRG */
/* Set the GPIO Alternate Function Register Lo (AFL) register */
ld r0, #%30
or.b Z16F_GPIOD_AFL, r0 /* Z16F_GPIOD_AFL |= %30 */
/* Enable UART receive (REN) and transmit (TEN) */
clr.b Z16F_UART1_CTL1 /* Z16F_UART1_CTL1 = 0 */
ld r0, #%c0
ld r0, #(Z16F_UARTCTL0_TEN|Z16F_UARTCTL0_REN)
ld.b Z16F_UART1_CTL0, r0 /* Z16F_UART1_CTL0 = %c0 */
#endif
popmlo <r0, R3> /* Restore registers */
popmlo <r0, r3> /* Restore registers */
ret /* Return */
......@@ -131,22 +144,21 @@ z16f_lowuartinit:
#ifdef CONFIG_ARCH_LOWPUTC
_z16f_xmitc:
pushmlo <r0> /* Save registers */
pushmlo <r0> /* Save registers */
_z16f_xmitc1:
ld r0, #Z16F_UARTSTAT0_TDRE /* TDRE=Transmitter Data Register Empty */
#ifdef CONFIG_UART0_SERIAL_CONSOLE
ld r0,#4
tm.b Z16F_UART0_STAT0,r0
jp eq, _z16f_xmitc1 /* While (!(Z16F_UART0_STAT0 & %4)) */
ld.b Z16F_UART0_TXD,r1 /* Z16F_UART0_TXD = r1 (character) */
tm.b Z16F_UART0_STAT0, r0 /* r0 = Z16F_UART0_STAT0 */
jp eq, _z16f_xmitc1 /* While (!(Z16F_UART0_STAT0 & TDRE)) */
ld.b Z16F_UART0_TXD, r1 /* Z16F_UART0_TXD = r1 (character) */
#else
ld r0,#4
tm.b Z16F_UART1_STAT0,r0
jp eq, _z16f_xmitc1 /* While (!(Z16F_UART1_STAT0 & %4)) */
ld.b Z16F_UART1_TXD,r1 /* Z16F_UART1_TXD = r1 (character) */
tm.b Z16F_UART1_STAT0, r0 /* r0 = Z16F_UART0_STAT1 */
jp eq, _z16f_xmitc1 /* While (!(Z16F_UART1_STAT0 & TDRE)) */
ld.b Z16F_UART1_TXD, r1 /* Z16F_UART1_TXD = r1 (character) */
#endif
popmlo <r0> /* Restore registers */
ret /* Return */
popmlo <r0> /* Restore registers */
ret /* Return */
#endif
/*************************************************************************
......@@ -200,13 +212,13 @@ _up_lowputc1:
#ifdef CONFIG_ARCH_LOWGETC
_up_lowgetc:
up_lowgetc1:
ld r0, #%80
ld r0, #Z16F_UARTSTAT0_RDA /* RDA=Receive data available */
#ifdef CONFIG_UART0_SERIAL_CONSOLE
tm.b Z16F_UART0_STAT0,r0
jp eq, _up_lowgetc1 /* While (!Z16F_UART0_STAT0 & %80)) */
tm.b Z16F_UART0_STAT0, r0
jp eq, _up_lowgetc1 /* While (!Z16F_UART0_STAT0 & RDA)) */
ld.ub r0, Z16F_UART0_RXD /* r0 = Z16F_UART0_RXD */
#else
tm.b Z16F_UART1_STAT0,r0 /* While (!Z16F_UART1_STAT0 & %80) */
tm.b Z16F_UART1_STAT0,r0 /* While (!Z16F_UART1_STAT0 & RDA) */
jp eq, _up_lowgetc1
ld.ub r0, Z16F_UART1_RXD /* r0 = Z16F_UART1_RXD */
#endif
......
This diff is collapsed.
......@@ -70,10 +70,9 @@ CONFIG_DRAM_SIZE=65536
# This specific the size of the receive buffer
# CONFIG_UARTn_TXBUFSIZE - Characters are buffered before
# being sent. This specific the size of the transmit buffer
# CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be
# CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8.
# CONFIG_UARTn_BAUD - The configure BAUD of the UART.
# CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
# CONFIG_UARTn_2STOP - Two stop bits
# CONFIG_UARTn_2STOP - 0=1 stop bit; 1=Two stop bits
#
CONFIG_UART0_SERIAL_CONSOLE=y
CONFIG_UART1_SERIAL_CONSOLE=n
......@@ -83,8 +82,6 @@ CONFIG_UART0_RXBUFSIZE=256
CONFIG_UART1_RXBUFSIZE=256
CONFIG_UART0_BAUD=115200
CONFIG_UART1_BAUD=115200
CONFIG_UART0_BITS=8
CONFIG_UART1_BITS=8
CONFIG_UART0_PARITY=0
CONFIG_UART1_PARITY=0
CONFIG_UART0_2STOP=0
......
......@@ -73,6 +73,11 @@ static void z16f_gpioinit(void)
/* Configure Direction switch port */
putreg8(getreg8(Z16F_GPIOC_DD) | 0x01, Z16F_GPIOC_DD);
/* Configure to use both UART0 and 1 */
putreg8(getreg8(Z16F_GPIOA_AFL) | 0x30, Z16F_GPIOA_AFL);
putreg8(getreg8(Z16F_GPIOD_AFL) | 0x30, Z16F_GPIOD_AFL);
}
/***************************************************************************
......
/************************************************************************************
* serial.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
......@@ -14,7 +14,7 @@
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
......
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