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f4grx
NuttX RTOS
Commits
db2fe456
Commit
db2fe456
authored
9 years ago
by
Gregory Nutt
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Update some comments
parent
4b29bcee
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Changes
4
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4 changed files
Documentation
+1
-1
1 addition, 1 deletion
Documentation
drivers/mtd/skeleton.c
+3
-2
3 additions, 2 deletions
drivers/mtd/skeleton.c
drivers/timers/ds3231.h
+2
-2
2 additions, 2 deletions
drivers/timers/ds3231.h
include/nuttx/arch.h
+5
-5
5 additions, 5 deletions
include/nuttx/arch.h
with
11 additions
and
10 deletions
Documentation
@
bc3e2537
Subproject commit
402546464095015a48662c75a13861a6100153fd
Subproject commit
bc3e2537116a608a90b89e9e1a7b2c72593d8c58
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drivers/mtd/skeleton.c
+
3
−
2
View file @
db2fe456
...
...
@@ -100,7 +100,7 @@ static struct skel_dev_s g_skeldev =
skel_bwrite
,
skel_read
,
#ifdef CONFIG_MTD_BYTE_WRITE
skel_write
,
skel_write
,
/* Should be NULL if the byte write method is not supported */
#endif
skel_ioctl
},
...
...
@@ -226,7 +226,8 @@ static ssize_t skel_read(FAR struct mtd_dev_s *dev, off_t offset,
*
* Description:
* Some FLASH parts have the ability to write an arbitrary number of
* bytes to an arbitrary offset on the device.
* bytes to an arbitrary offset on the device. This method should be
* implement only for devices that support such access.
*
****************************************************************************/
...
...
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Click to expand it.
drivers/timers/ds3231.h
+
2
−
2
View file @
db2fe456
...
...
@@ -169,7 +169,7 @@
# define DS1307_CR_RS_32KHZ (3 << DS1307_CR_RS_SHIFT)
/* 32.768kHz */
# define DS1307_CR_SQWE (1 << 4)
/* Bit 4: Square wave enable */
# define DS1307_CR_OUT (1 << 7)
/* Bit 7: Output control */
# define DS1307_RAM_BASE
0x08
/* 0x08-0x3f: 56x8 RAM */
# define DS1307_RAM_BASE
R
0x08
/* 0x08-0x3f: 56x8 RAM */
#endif
#if defined(CONFIG_RTC_DS3231) || defined(CONFIG_RTC_DS3232) || defined(CONFIG_RTC_DS3234)
...
...
@@ -334,7 +334,7 @@
#endif
/* CONFIG_RTC_DS3231 || CONFIG_RTC_DS3232 || CONFIG_RTC_DS3234 */
#ifdef CONFIG_RTC_DS3232
# define DS3232_SRAM_BASE
0x14
/* 0x14-0xff: SRAM */
# define DS3232_SRAM_BASE
R
0x14
/* 0x14-0xff: SRAM */
#endif
/* CONFIG_RTC_DS3232 */
#ifdef CONFIG_RTC_DS3234
...
...
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include/nuttx/arch.h
+
5
−
5
View file @
db2fe456
...
...
@@ -1770,7 +1770,7 @@ size_t up_check_intstack_remain(void);
* Description:
* Initialize the builtin, MCU hardware RTC per the selected
* configuration. This function is called once very early in the OS
* initialization sequence
* initialization sequence
.
*
* NOTE that initialization of external RTC hardware that depends on the
* availability of OS resources (such as SPI or I2C) must be deferred
...
...
@@ -1803,7 +1803,7 @@ int up_rtc_initialize(void);
* None
*
* Returned Value:
* The current time in seconds
* The current time in seconds
.
*
************************************************************************************/
...
...
@@ -1823,7 +1823,7 @@ time_t up_rtc_time(void);
* tp - The location to return the high resolution time value.
*
* Returned Value:
* Zero (OK) on success; a negated errno on failure
* Zero (OK) on success; a negated errno
value
on failure
.
*
************************************************************************************/
...
...
@@ -1850,7 +1850,7 @@ int up_rtc_gettime(FAR struct timespec *tp);
* tp - The location to return the high resolution time value.
*
* Returned Value:
* Zero (OK) on success; a negated errno on failure
* Zero (OK) on success; a negated errno
value
on failure
.
*
************************************************************************************/
...
...
@@ -1869,7 +1869,7 @@ int up_rtc_getdatetime(FAR struct tm *tp);
* tp - the time to use
*
* Returned Value:
* Zero (OK) on success; a negated errno on failure
* Zero (OK) on success; a negated errno
value
on failure
.
*
************************************************************************************/
...
...
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