arch/arm/src/stm32: Remove bogus definitions of STM32_BKP_BASE from the F2,...

arch/arm/src/stm32:  Remove bogus definitions of STM32_BKP_BASE from the F2, F3, and F4 memory maps.  Unlike the F1, these parts do not have a separate BKP address region.  The BKP registers are with the RTCC address regions.

arch/arm/src/stm32/chip/stm32f20xxx_memorymap.h

@@ -129,7 +129,6 @@
 #define STM32_TIM13_BASE     0x40001c00     /* 0x40001c00-0x40001fff: TIM13 timer */
 #define STM32_TIM14_BASE     0x40002000     /* 0x40002000-0x400023ff: TIM14 timer */
 #define STM32_RTC_BASE       0x40002800     /* 0x40002800-0x40002bff: RTC & BKP registers */
-#define STM32_BKP_BASE       0x40002850
 #define STM32_WWDG_BASE      0x40002c00     /* 0x40002c00-0x40002fff: Window watchdog (WWDG) */
 #define STM32_IWDG_BASE      0x40003000     /* 0x40003000-0x400033ff: Independent watchdog (IWDG) */
 #define STM32_I2S2EXT_BASE   0x40003400     /* 0x40003400-0x400037ff: I2S2ext */

arch/arm/src/stm32/chip/stm32f30xxx_memorymap.h

@@ -92,8 +92,7 @@
 #define STM32_TIM4_BASE      0x40000800     /* 0x40000800-0x40000bff TIM4 */
 #define STM32_TIM6_BASE      0x40001000     /* 0x40001000-0x400013ff TIM6 */
 #define STM32_TIM7_BASE      0x40001400     /* 0x40001400-0x400017ff TIM7 */
-#define STM32_RTC_BASE       0x40002800     /* 0x40002800-0x40002bff RTC */
-#define STM32_BKP_BASE       0x40002850     /* 0x40002850-0x4000288c BKP */
+#define STM32_RTC_BASE       0x40002800     /* 0x40002800-0x40002bff RTC and BKP */
 #define STM32_WWDG_BASE      0x40002c00     /* 0x40002c00-0x40002fff WWDG */
 #define STM32_IWDG_BASE      0x40003000     /* 0x40003000-0x400033ff IWDG */
 #define STM32_I2S2EXT_BASE   0x40003400     /* 0x40003400-0x400037ff I2S2ext */

arch/arm/src/stm32/chip/stm32f33xxx_memorymap.h

@@ -93,8 +93,7 @@
 #define STM32_TIM3_BASE      0x40000400     /* 0x40000400-0x400007ff TIM3 */
 #define STM32_TIM6_BASE      0x40001000     /* 0x40001000-0x400013ff TIM6 */
 #define STM32_TIM7_BASE      0x40001400     /* 0x40001400-0x400017ff TIM7 */
-#define STM32_RTC_BASE       0x40002800     /* 0x40002800-0x40002bff RTC */
-#define STM32_BKP_BASE       0x40002850     /* 0x40002850-0x400028cc BKP */
+#define STM32_RTC_BASE       0x40002800     /* 0x40002800-0x40002bff RTC and BKP */
 #define STM32_WWDG_BASE      0x40002c00     /* 0x40002c00-0x40002fff WWDG */
 #define STM32_IWDG_BASE      0x40003000     /* 0x40003000-0x400033ff IWDG */
 #define STM32_USART2_BASE    0x40004400     /* 0x40004400-0x400047ff USART2 */

arch/arm/src/stm32/chip/stm32f37xxx_memorymap.h

@@ -93,8 +93,7 @@
 #define STM32_TIM12_BASE     0x40001800     /* 0x40001800-0x40001bff TIM12 */
 #define STM32_TIM13_BASE     0x40001c00     /* 0x40001c00-0x40001fff TIM13 */
 #define STM32_TIM14_BASE     0x40002000     /* 0x40002000-0x400023ff TIM14 */
-#define STM32_RTC_BASE       0x40002800     /* 0x40002800-0x40002bff RTC */
-#define STM32_BKP_BASE       0x40002850     /* 0x40002850-0x400028cc BKP */
+#define STM32_RTC_BASE       0x40002800     /* 0x40002800-0x40002bff RTC and BKP */
 #define STM32_WWDG_BASE      0x40002c00     /* 0x40002c00-0x40002fff WWDG */
 #define STM32_IWDG_BASE      0x40003000     /* 0x40003000-0x400033ff IWDG */
 #define STM32_SPI2_BASE      0x40003800     /* 0x40003800-0x40003bff SPI2, or */

arch/arm/src/stm32/chip/stm32f40xxx_memorymap.h

@@ -129,7 +129,6 @@
 #define STM32_TIM13_BASE     0x40001c00     /* 0x40001c00-0x40001fff: TIM13 timer */
 #define STM32_TIM14_BASE     0x40002000     /* 0x40002000-0x400023ff: TIM14 timer */
 #define STM32_RTC_BASE       0x40002800     /* 0x40002800-0x40002bff: RTC & BKP registers */
-#define STM32_BKP_BASE       0x40002850
 #define STM32_WWDG_BASE      0x40002c00     /* 0x40002c00-0x40002fff: Window watchdog (WWDG) */
 #define STM32_IWDG_BASE      0x40003000     /* 0x40003000-0x400033ff: Independent watchdog (IWDG) */
 #define STM32_I2S2EXT_BASE   0x40003400     /* 0x40003400-0x400037ff: I2S2ext */

arch/arm/src/stm32/stm32.h

@@ -57,7 +57,6 @@
 
 #include "chip.h"
 #include "stm32_adc.h"
-//#include "stm32_bkp.h"
 #include "stm32_can.h"
 #include "stm32_comp.h"
 #include "stm32_dbgmcu.h"