Addition rwbuffer interfaces should not be enabled unless they are needed; if rwbuffer support is enabled, it should not be unconditionally enabled in SMART and FTL

SAMA5 PIO: Fix a typo in Schmitt trigger configuration; Configure pin as a a vanilla input first so that final pin configuration is more read-able (i.e., easier to debug)

SAMA5 TWI: Some restructured needed by up_i2creset.  Also timeout needs to vary with the size of the transfer and if debug is on or not

Use sam_pio_forceclk() so that we can read the current state of an open-drain output in the TWI reset logic.

Add a new interface sam_pio_forceclk() that can be used to force PIO clocking on.  I am afraid I was too conservative with PIO clocking in the initial design; this is the price

SAMA5D3/4 HEAP: Add a configuration option to reserve DRAM for a framebuffer when executing out of DRAM.

MXT Driver: Make sure that all return values are checked:  Fix worker thread -- it must hold the MXT device semaphore to access I2C