Commits · 5666bf30a7284c5c6906f0286854cb2844182ad5 · f4grx / NuttX RTOS · GitLab

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Dec 20, 2016
- Review of last PR · 5666bf30
  Gregory Nutt authored Dec 20, 2016
  
  5666bf30
- Merged in young-mu/nuttx (pull request #187) · 1ed25c0d
  Gregory Nutt authored Dec 20, 2016
  1ed25c0d
- Improve the PWM logs · 07b70fcc
  Young authored Dec 20, 2016
  
  07b70fcc
- Support indefinite number of pulses generation in PULSECOUNT mode · 9d355e12
  Young authored Dec 20, 2016
  
  9d355e12
- Support PWM_PULSECOUNT feature for TI tiva · e35406f7
  Young authored Dec 20, 2016
  
  e35406f7
- Merged nuttx/nuttx into master · b737f0e1
  Young authored Dec 20, 2016
  
  b737f0e1
Dec 19, 2016
- Xtensa ESP32: Make sure that SMP configuratin still builds without errors. · e5182acb
  Gregory Nutt authored Dec 19, 2016
  
  e5182acb
- Xtensa ESP32: Clean-up and fixes from last commits · e61549d8
  Gregory Nutt authored Dec 19, 2016
  
  e61549d8
- Xtensa ESP32: Corrects timer initialization and timer input frequency. · 097f09cb
  Gregory Nutt authored Dec 19, 2016
  
  097f09cb
- Xtensa ESP32: Fixes some double faults and user errors, but I do not fully understand why. · a9a39800
  Gregory Nutt authored Dec 19, 2016
  
  a9a39800
- Xtensa ESP32: Automatically mount /proc at start-up. · 886ce88b
  Gregory Nutt authored Dec 19, 2016
  
  886ce88b
Dec 18, 2016
- Update README. · b47255a6
  Gregory Nutt authored Dec 18, 2016
  
  b47255a6
- ESP32 Serial: Add logic to prevent infinite loops in interrupt handler. · 2b0b698d
  Gregory Nutt authored Dec 18, 2016
  
  2b0b698d
- ESP32 Serial: Fix some register bit definitions. · 71bb79a6
  Gregory Nutt authored Dec 18, 2016
  
  71bb79a6
- Xtensa ESP32: Last change should be conditioned on the window ABI. · 4bd530d0
  Gregory Nutt authored Dec 18, 2016
  
  4bd530d0
- Xtensa ESP32: Need to spill registers to memory as the last dying action... · 665c1647
  Gregory Nutt authored Dec 18, 2016
  665c1647
- Fix context save logic when called in window ABI configuration. Add an IDLE... · 586f0aab
  Gregory Nutt authored Dec 18, 2016
  586f0aab
Dec 17, 2016
- Add an attribution to the scanset addition to sscanf() · 8ce1fdaa
  Gregory Nutt authored Dec 17, 2016
  
  8ce1fdaa
- Add scansets to the scanf function. Enabled CONFIG_LIBC_SCANSET option. · 7be1b86a
  Author: Aleksandr Vyhovanec authored Dec 17, 2016
  
  7be1b86a
- Xtensa ESP32: wsr, not rsr. · 93e6d16f
  Gregory Nutt authored Dec 17, 2016
  
  93e6d16f
- Xtensa ESP32: Need to clone some logic for syncrhonous context switch. Window... · a88c50d3
  Gregory Nutt authored Dec 17, 2016
  a88c50d3
- Xtensa ESP32: Fix clobbered a9 in co-processor context save/restore · 6b80e5f1
  Gregory Nutt authored Dec 17, 2016
  
  6b80e5f1
- Xtensa ESP32: Using wrong register to disable interrupts. · 8de11278
  Gregory Nutt authored Dec 17, 2016
  
  8de11278
- Merged in david_s5/nuttx/master_cdcacm_fix (pull request #185) · b506bd6e
  Gregory Nutt authored Dec 17, 2016
  b506bd6e
- Merged in david_s5/nuttx (pull request #184) · e7a21b51
  Gregory Nutt authored Dec 17, 2016
  e7a21b51
- Merged nuttx/nuttx into master · 950c140f
  David Sidrane authored Dec 17, 2016
  
  950c140f
- STM32: Fix some STM32F7 copy paste errors · ec854250
  David Sidrane authored Dec 17, 2016
  
  ec854250
- BugFix:uart_ops_s portion of cdcacm will not be initalized with correct... · 54810876
  David Sidrane authored Dec 17, 2016
  54810876
- Xtensa ESP32: Change that should have been included in a previous commit was not. · 38ebe6c1
  Gregory Nutt authored Dec 17, 2016
  
  38ebe6c1
- One register getting clobber on context save · 05e79848
  Gregory Nutt authored Dec 17, 2016
  
  05e79848
- Xtensa ESP32: Fix a duplicate in Kconfig files. Level 1 should return via RFE. · adbacfc4
  Gregory Nutt authored Dec 17, 2016
  
  adbacfc4
- C&P error from F7 · d9c01052
  David Sidrane authored Dec 17, 2016
  
  d9c01052
Dec 16, 2016
- Xtensa ESP32: Fixes a few issue with restoring registers on interrupt return,... · 6599feb3
  Gregory Nutt authored Dec 16, 2016
  6599feb3
- Xtensa ESP32: Basically a redesign of the interrupt dispatch logic. · cdd8dc72
  Gregory Nutt authored Dec 16, 2016
  
  cdd8dc72
- Xtensa ESP32: Minor rearchitecting of how CPU interrupts are enabled. MOre to come. · d4ad5f04
  Gregory Nutt authored Dec 16, 2016
  
  d4ad5f04
- Xtensa: Fix some missing SMP logic · cd3d414b
  Gregory Nutt authored Dec 16, 2016
  
  cd3d414b
- Correct a logic problem the prevented dumping the IDLE thread's stack on an assertion · 34a994b0
  Gregory Nutt authored Dec 16, 2016
  
  34a994b0
- Missing escape character on CR of CR-LF expansion. · 6337fadd
  Gregory Nutt authored Dec 16, 2016
  
  6337fadd
- Update some comments · 935e49f5
  Gregory Nutt authored Dec 16, 2016
  
  935e49f5
- Use r6, not r2 when passing paramters with call4 · f1a5b91c
  Gregory Nutt authored Dec 16, 2016
  
  f1a5b91c

Documentation Code Eelctrolab