- Apr 01, 2015
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Gregory Nutt authored
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- Mar 31, 2015
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Gregory Nutt authored
rch_tcinitialize() and arch_tcunitinitialize() renamed to board_tsc_setup() and board_tsc_teardown(). These are not long called directly by applications but only indirectly throught the crappy boardctl() OS interface.
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Gregory Nutt authored
SAMV71-XULT: Add option to support connection of the maXTouch Xplained Pro on the 50-pin LCD connector
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- Mar 29, 2015
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Gregory Nutt authored
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Gregory Nutt authored
The STM32F4Discovery board doesn't come with a Low speed external oscillator so the default LSE source for the RTC doesn't work. In stm32_rtcc.c the up_rtcinitialize() logic doesn't work with the LSI. The check on RTC_MAGIC on the BK0R register lead to rtc_setup() call that rightfully enables the lsi clock; but the next times, when the rtc is already setup, the rtc_resume() call does NOT start the lsi clock! The right place to put LSE/LSI initialisation is inside stm32_stdclockconfig() in stm32fxxxxx_rcc.c. Doing this I checked the possible uses of the LSI and the LSE sources: the LSI can be used for RTC and/or the IWDG, while the LSE only for the RTC (and to output the MCO1 pin).. This change is not verifed for any other platforms. From Leo Aloe3132
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Gregory Nutt authored
SAMV7 Ethernet: I- and D-Cache are now enabled in the netnsh/ configuration. D-Cache is enabled in write-though mode. This mode is necessary because the DMA descriptors are each 8-bytes in size but the D-Cache cache line is 32-bits in size. So it is impossible make coherency for every 8-byte DMA descriptor without write-through.
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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- Mar 28, 2015
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Gregory Nutt authored
Clean up pointer handling to make code more readability. This re-introduces the compiler optimization problem but this is the correct thing to do. I will have to drop back from -Os to -O2.
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Gregory Nutt authored
SAMV7 EMAC: Fix alignment issue: RX buffers need to be invalidated. This means the alignment of buffers must be at least to the data cache line size at both ends of the buffer
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Gregory Nutt authored
SAMV7 EMAC: Sometimes TX is not started when TSTART is set??? Workaround seems to be to set it twice. Restored full optimization. Also CONFIG_NET_NOINTS is set so that interrupt level provessing is avoided
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- Mar 27, 2015
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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- Mar 26, 2015
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
SAMV7 USB: Move clock initialization back to sam_clockconfig.c; add seperate UTMI register definition header file; fix a couple of typo bugs
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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- Mar 25, 2015
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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- Mar 24, 2015
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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- Mar 23, 2015
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
SAMV7: Add framework for USB DCD. Initial check-in is just the SAMA5 USB DCD with naming changes to get a clean compilation. Needs careful review and comparison with datasheet and, of course, testing
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Gregory Nutt authored
Update some recent Tiva changes so that old LM3S parts at least still build (but have not been retested)
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Gregory Nutt authored
instead of Kconfig to help reduce bloat and confusion. - Timer changed to remove ADC coupling in Kconfig to code and moved configuration up from arch/arm/src/tiva to configs/tm4c123g-launchpad/src. - GPIO driver needed small fixes in the configuration routines and discovered false-positive bugs in interrupt testing: interrupts are now verified to actually be working reliably. - Attempt to apply some consistency in the tiva arch/ level's interface to the config/board/ level driver configuration. From Calvin Maguranis
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Gregory Nutt authored
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