CHxN channels are always outputs

Initial implemention of the STM32 F37xx SDADC module. There are also changes to ADC, DAC modules. SDADC has only been tested in DMA mode and does not support external TIMER triggers. This is a work in progress.

Enable and renames for 32l4 UARTs 4 and 5

Fix i2c devices rcc registers

STM32 F4 I2c: A new implementation of the STM32 F4 I2C bottom half.  The commin I2C as this did not handled correctly in the current implementation (see also https://github.com/PX4/NuttX/issues/54).  The changes almost exclusively affect the ISR.