SAMV7:  Apparently the data sheet is wrong, SDRAM clocking must be enabled at the PMC or the SDRAM does not work!  The data sheet says that there is no clock control for SDRAMC

More renaming: up_lcdinitialize->board_lcd_initialize, up_lcdgetdev->board_lcd_getdev, up_lcduninitialize->board_lcd_uninitialize

SAMV7: Add SMC register definition header file; SAMV71-Xult: Add an LCD driver.  The initial commit is simply the SAVM4E-EK ILI9375 driver will bogus name changes to ILI9488.

rch_tcinitialize() and arch_tcunitinitialize() renamed to board_tsc_setup() and board_tsc_teardown().  These are not long called directly by applications but only indirectly throught the crappy boardctl() OS interface.

SAMV71-XULT: Add option to support connection of the maXTouch Xplained Pro on the 50-pin LCD connector

The STM32F4Discovery board doesn't come with a Low speed external oscillator so the default LSE source for the RTC doesn't work.

In stm32_rtcc.c the up_rtcinitialize() logic doesn't work with the LSI. The check on RTC_MAGIC on the BK0R register lead to rtc_setup() call that rightfully enables the lsi clock; but the next times, when the rtc is already setup, the rtc_resume() call does NOT start the lsi clock!

The right place to put LSE/LSI initialisation is inside stm32_stdclockconfig() in stm32fxxxxx_rcc.c.  Doing this I checked the possible uses of the LSI and the LSE sources: the LSI can be used for RTC and/or the IWDG, while the LSE only for the RTC (and to output the MCO1 pin)..

This change is not verifed for any other platforms.

From Leo Aloe3132

SAMV7 Ethernet:  I- and D-Cache are now enabled in the netnsh/ configuration.  D-Cache is enabled in write-though mode.  This mode is necessary because the DMA descriptors are each 8-bytes in size but the D-Cache cache line is 32-bits in size. So it is impossible make coherency for every 8-byte DMA descriptor without write-through.

Clean up pointer handling to make code more readability.  This re-introduces the compiler optimization problem but this is the correct thing to do.  I will have to drop back from -Os to -O2.

SAMV7 EMAC: Fix alignment issue: RX buffers need to be invalidated.  This means the alignment of buffers must be at least to the data cache line size at both ends of the buffer

SAMV7 EMAC: Sometimes TX is not started when TSTART is set??? Workaround seems to be to set it twice.  Restored full optimization.  Also CONFIG_NET_NOINTS is set so that interrupt level provessing is avoided

SAMV7 USB: Move clock initialization back to sam_clockconfig.c; add seperate UTMI register definition header file; fix a couple of typo bugs