For Cortex-A9, should also set ACTLR.FW in SMP mode to enble TLB and cache broadcasts.  Does not fix SMP cache problem.

Allow a config to override the SDIO clock edge setting

Remove BOARDIOC_CAN_INITIALIZE.  CAN initializaiton is now performed in board bring-up logic just like every other device driver.

Remove BOARDIOC_CAN_INITIALIZE.  CAN initialization is now done in the board initialization logic just like every other device driver.

Upstream to greg

   Added missing bits definitions
   Used stm32F469 and stm32f446 bit definitions
   Removed unsed header file

SAMA5 does not build when executing from SDRAM before board frequencies are not constant.  Rather, the bootloader configures the clocking and we must derive the clocking from the MCK left by the bootloader.  This means lots more computations.  This is untested on initial commit because I don't have a good PWM test setup right now.